DES Registers
www.ti.com
682
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Data Encryption Standard Accelerator (DES)
18.5.9 DES_KEY1_L Register (Offset = 1010h) [reset = 0h]
DES_KEY1_L is shown in Figure 18-16 and described in Table 18-16.
Return to Summary Table.
KEY1 (LSW) for 192-bit key.
Figure 18-16. DES_KEY1_L Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
KEY1_L
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 18-16. DES_KEY1_L Register Field Descriptions
Bit Field Type Reset Description
31-0 KEY1_L R/W 0h
Data for key1
To Next Page
Loading...
