Texas Instruments CC3235 SimpleLink Series - RCM_IEN Register; RCM_IEN Register Field Descriptions

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SWRU543–January 2019
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Power, Reset, and Clock Management
15.6.50 RCM_IEN Register (offset = 124h) [reset = 0h]
RCM_IEN is shown in Figure 15-53 and described in Table 15-53.
Figure 15-53. RCM_IEN Register
31 30 29 28 27 26 25 24
RESERVED
R-0h
23 22 21 20 19 18 17 16
RESERVED
R-0h
15 14 13 12 11 10 9 8
RESERVED
R-0h
7 6 5 4 3 2 1 0
RESERVED WAKETIMERIR
Q
RESERVED PLLLOCKIRQ
R-0h R/W-0h R-0h R/W-0h
Table 15-53. RCM_IEN Register Field Descriptions
Bit Field Type Reset Description
31-3 RESERVED R 0h
2 WAKETIMERIRQ R/W 0h
To enable RTC timer interrupt set 0th bit of
HIB3P3:MEM_HIB_RTC_IRQ_ENABLE(0x4402 F854) to 1
0h = Unmask this interrupt.
1h = Unmask interrupt to the APPS processor when RTC timer
reaches the programmed value.
1 RESERVED R 0h
0 PLLLOCKIRQ R/W 0h
0h = Mask this interrupt
1h = Unmask Interrupt to APPS processor when PLL is locked.