Texas Instruments CC3235 SimpleLink Series - I2 CFIFOSTATUS Register

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SWRU543–January 2019
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Inter-Integrated Circuit (I
2
C) Interface
7.3.25 I2CFIFOSTATUS Register (Offset = F08h) [reset = 00010005h]
I2CFIFOSTATUS is shown in Figure 7-38 and described in Table 7-29.
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This register contains the real-time status of the RX and TX FIFOs.
Figure 7-38. I2CFIFOSTATUS Register
31 30 29 28 27 26 25 24
RESERVED
R-0h
23 22 21 20 19 18 17 16
RESERVED RXABVTRIG RXFF RXFE
R-0h R-0h R-0h R-1h
15 14 13 12 11 10 9 8
RESERVED
R-0h
7 6 5 4 3 2 1 0
RESERVED TXBLWTRIG TXFF TXFE
R-0h R-1h R-0h R-1h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 7-29. I2CFIFOSTATUS Register Field Descriptions
Bit Field Type Reset Description
31-19 RESERVED R 0h
18 RXABVTRIG R 0h
RX FIFO Above Trigger Level
0h = The number of bytes in RX FIFO is below the trigger level
programmed by the RXTRIG bit in the I2CFIFOCTL register
1h = The number of bytes in the RX FIFO is above the trigger level
programmed by the RXTRIG bit in the I2CFIFOCTL register
17 RXFF R 0h
RX FIFO Full
0h = The RX FIFO is not full.
1h = The RX FIFO is full.
16 RXFE R 1h
RX FIFO Empty
0h = The RX FIFO is not empty.
1h = The RX FIFO is empty.
15-3 RESERVED R 0h
2 TXBLWTRIG R 1h
TX FIFO Below Trigger Level
0h = The number of bytes in TX FIFO is above the trigger level
programmed by the TXTRIG bit in the I2CFIFOCTL register
1h = The number of bytes in the TX FIFO is below the trigger level
programmed by the TXTRIG bit in the I2CFIFOCTL register
1 TXFF R 0h
TX FIFO Full
0h = The TX FIFO is not full.
1h = The TX FIFO is full.
0 TXFE R 1h
TX FIFO Empty
0h = The TX FIFO is not empty.
1h = The TX FIFO is empty.