AES Functional Description
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SWRU543–January 2019
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Copyright © 2019, Texas Instruments Incorporated
Advance Encryption Standard Accelerator (AES)
17.2.3.2 Extended and Combined Modes of Operations
This section describes the protocols (or autonomous precalculations) supported by the AES wide-bus
engine.
GCM Protocol Operation
A GCM protocol operation is a combined operation consisting of encryption or decryption, and
authentication. A part of the input data stream can be authenticated only, while normally most of the input
data is encrypted or decrypted and authenticated. The authentication-only data must always be in front of
the data requiring encryption. Within GCM, the authentication-only data is called the additional
authentication data (AAD). The AAD is fetched independently of other data.
The intermediate (temporary) result data is used as input to the remaining authentication operation.
Because the authentication operation does not require the cryptographic core but only the polynomial
multiplication, encryption, decryption, and authentication can be performed in parallel. After encryption of
the last data block, additional polynomial multiplication and encryption are required to authenticate a 128-
bit-long vector and finally encrypt the authentication result.
CCM Protocol Operation
The CCM protocol operation is a combined operation consisting of encryption or decryption, and
authentication. The authentication and encryption or decryption operations use the cryptographic core;
these operations are executed sequentially on the AES core. A part of the data stream can require
authentication only. The authentication-only data must always be in front of the data requiring encryption.
Authentication starts with the encryption of a predefined block B0. This block consists of flags, nonce, and
message length. The next blocks contain the authentication data length concatenated with the
authentication-only data. After processing the authentication-only data, the encryption or decryption
operations are performed, each followed by the related authentication of the plaintext data block (which
equals the input in the case of encryption, and the output in the case of decryption). The final
authentication result must be encrypted using the output of the encryption of the IV block A0. This block
contains the IV (consisting of flags and nonce) concatenated with the counter, which is zero for A0.
17.2.4 Hardware Requests
The AES module can assert a µDMA request for context in, context out, input data, or output data read.
The AES µDMA Interrupt Mask (AES_DMAIM) register can be set to generate interrupts during the
following events:
• Context In µDMA request (Cin)
• Context Out µDMA request (Cout)
• Data In µDMA request (Din)
• Data Out µDMA request (Dout)
The AES module can be programmed to assert an interrupt when the µDMA has completed its last
transfer.
If context and data transfers are to be handled through software, then the AES Interrupt Enable
(AES_IRQENABLE) register can be used to enable interrupt triggering when context out, context in, data
in, or data out is ready. The AES Interrupt Status (AES_IRQSTATUS) register indicates when an interrupt
is triggered, as listed in Table 17-2.
Table 17-2. Interrupts and Events
Event Description
AES_IRQSTATUS[3]: CONTEXT_OUT Context output interrupt
AES_IRQSTATUS[2]: DATA_OUT Data output interrupt
AES_IRQSTATUS[1]: DATA_IN Data input interrupt
AES_IRQSTATUS[0]: CONTEXT_IN Context input interrupt
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