Texas Instruments CC3235 SimpleLink Series - MMCHS_RSP10 Register; MMCHS_RSP10 Register Field Descriptions

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SWRU543–January 2019
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SD Host Controller Interface
11.7.6 MMCHS_RSP10 Register (Offset = 210h) [reset = 0h]
Command Response[31:0] register
MMCHS_RSP10 is shown in Figure 11-7 and described in Table 11-10.
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This 32-bit register holds bits positions [31:0] of command response type R1/R1b/R2/R3/R4/R5/R5b/R6.
Figure 11-7. MMCHS_RSP10 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSP1 RSP0
R-0h R-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 11-10. MMCHS_RSP10 Register Field Descriptions
Bit Field Type Reset Description
31-16 RSP1 R 0h
R1/R1b (normal response) /R3/R4/R5/R5b/R6 : Command
Response [39:24]
R2: Command Response [31:16]
15-0 RSP0 R 0h
R1/R1b (normal response) /R3/R4/R5/R5b/R6 : Command
Response [23:8]
R2: Command Response [15:0]