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PRCM Registers
579
SWRU543–January 2019
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Power, Reset, and Clock Management
15.6.49 RCM_IS Register (offset = 120h) [reset = 0h]
RCM_IS is shown in Figure 15-52 and described in Table 15-52.
Figure 15-52. RCM_IS Register
31 30 29 28 27 26 25 24
RESERVED
R-0h
23 22 21 20 19 18 17 16
RESERVED
R-0h
15 14 13 12 11 10 9 8
RESERVED WAKETIMRIR
Q
RESERVED PLLLOCK RESERVED
R-0h R-0h R-0h R-0h R-0h
7 6 5 4 3 2 1 0
RESERVED EXITDSLPBYT
MR
EXITSLPBYTM
R
EXITDSLPBYN
WP
EXITSLPBYNW
P
R-0h R-0h R-0h R-0h R-0h
Table 15-52. RCM_IS Register Field Descriptions
Bit Field Type Reset Description
31-15 RESERVED R 0h
14 WAKETIMRIRQ R 0h
To enable the RTC timer interrupt, set 0th bit of
HIB3P3:MEM_HIB_RTC_IRQ_ENABLE(0x4402 F854) and 2nd bit of
RCM_IEN(0x124) to 1,
1h = indicates interrupt to the APPS processor due to the RTC timer
reaching the programmed value.
13 RESERVED R 0h
12 PLLLOCK R 0h
Enable this interrupt by setting 0th bit of RCM_IEN(0x124).
1h = Indicates that an interrupt was received by the processor
because of PLL lock.
11-4 RESERVED R 0h
3 EXITDSLPBYTMR R 0h
apps_deep_sleep_timer_wake
1h = Indicates that deep-sleep timer expiry had caused the wakeup
from deep-sleep.
2 EXITSLPBYTMR R 0h
apps_sleep_timer_wake
1h = Indicates that sleep timer expiry had caused the wakeup from
sleep.
1 EXITDSLPBYNWP R 0h
apps_deep_sleep_wake_from_nwp
1h = Indicates that NWP had caused the wakeup from deep-sleep.
0 EXITSLPBYNWP R 0h
apps_sleep_wake_from_nwp
1h = Indicates that NWP had caused the wakeup from sleep