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Texas Instruments CC3235 SimpleLink Series - APINT Register; APINT Register Field Descriptions

Texas Instruments CC3235 SimpleLink Series
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99
SWRU543January 2019
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Copyright © 2019, Texas Instruments Incorporated
Cortex
®
-M4 Peripherals
3.3.1.14 APINT Register (Offset = D0Ch) [reset = FA050000h]
APINT is shown in Figure 3-14 and described in Table 3-17.
Return to Summary Table.
The APINT register provides priority grouping control for the exception model, endian status for data
accesses, and reset control of the system. To write to this register, 0x05FA must be written to the
VECTKEY field, otherwise the write is ignored. The PRIGROUP field indicates the position of the binary
point that splits the INTx fields in the Interrupt Priority (PRIx) registers into separate group priority and
subpriority fields. The bit numbers in the Group Priority Field and Subpriority Field columns in the table
refer to the bits in the INTA field. For the INTB field, the corresponding bits are 15:13; for INTC, 23:21;
and for INTD, 31:29.
NOTE: This register can only be accessed from privileged mode.
NOTE: Determining preemption of an exception uses only the group priority field.
PRIGROUP Bit Field = Binary Point = Group Priority Field = Subpriority Field = Group
Priorities = Subpriorities
0h-4h = bxxx = [7:5] = None = 8 = 1
5h = bxx.y = [7:6] = [5] = 4 = 2
6h = bx.yy = [7] = [6:5] = 2 = 4
7h = b.yyy = None = [7:5] = 1 = 8
INTx field showing the binary point. An x denotes a group priority field bit, and a y denotes a
subpriority field bit.
Figure 3-14. APINT Register
31 30 29 28 27 26 25 24
VECTKEY
R/W-FA05h
23 22 21 20 19 18 17 16
VECTKEY
R/W-FA05h
15 14 13 12 11 10 9 8
ENDIANESS RESERVED PRIGROUP
R-0h R-0h R/W-0h
7 6 5 4 3 2 1 0
RESERVED SYSRESREQ VECTCLRACT VECTRESET
R-0h W-0h W-0h W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 3-17. APINT Register Field Descriptions
Bit Field Type Reset Description
31-16 VECTKEY R/W FA05h
Register Key
This field is used to guard against accidental writes to this register.
0x05FA must be written to this field in order to change the bits in this
register. On a read, 0xFA05 is returned.
15 ENDIANESS R 0h
Data Endianess
The CC32xx implementation uses only little-endian mode, so this is
cleared to 0.
14-11 RESERVED R 0h

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