Texas Instruments CC3235 SimpleLink Series - AES_KEY2_6 Register; AES_KEY2_7 Register; AES_KEY2_6 Register Field Descriptions; AES_KEY2_7 Register Field Descriptions

www.ti.com AES Registers
633
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Advance Encryption Standard Accelerator (AES)
17.4.1 AES_KEY2_6 Register (Offset = 0h) [reset = 0h]
AES_KEY2_6 is shown in Figure 17-14 and described in Table 17-4.
Return to Summary Table.
XTS second key, CBC-MAC third key.
Figure 17-14. AES_KEY2_6 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
KEY
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 17-4. AES_KEY2_6 Register Field Descriptions
Bit Field Type Reset Description
31-0 KEY R/W 0h
Key data
17.4.2 AES_KEY2_7 Register (Offset = 4h) [reset = 0h]
AES_KEY2_7 is shown in Figure 17-15 and described in Table 17-5.
Return to Summary Table.
XTS second key (MSW for 256-bit key), CBC-MAC third key (MSW).
Figure 17-15. AES_KEY2_7 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
KEY
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 17-5. AES_KEY2_7 Register Field Descriptions
Bit Field Type Reset Description
31-0 KEY R/W 0h
Key data