www.ti.com
UART Registers
187
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Universal Asynchronous Receivers/Transmitters (UARTs)
6.3.4 UARTIBRD Register (Offset = 24h) [reset = 0h]
UARTIBRD is shown in Figure 6-6 and described in Table 6-6.
Return to Summary Table.
The UARTIBRD register is the integer part of the baud-rate divisor value. All the bits are cleared on reset.
The minimum possible divide ratio is 1 (when UARTIBRD=0), in which case the UARTFBRD register is
ignored. When changing the UARTIBRD register, the new value does not take effect until transmission or
reception of the current character is complete. Any changes to the baud-rate divisor must be followed by a
write to the UARTLCRH register.
Figure 6-6. UARTIBRD Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED DIVINT
R-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 6-6. UARTIBRD Register Field Descriptions
Bit Field Type Reset Description
31-16 RESERVED R 0h
15-0 DIVINT R/W 0h
Integer Baud-Rate Divisor
To Next Page