Texas Instruments CC3235 SimpleLink Series - AES_DATA_IN_0 Register; AES_DATA_IN_1 Register; AES_DATA_IN_0 Register Field Descriptions; AES_DATA_IN_1 Register Field Descriptions

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SWRU543–January 2019
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Advance Encryption Standard Accelerator (AES)
17.4.25 AES_DATA_IN_0 Register (Offset = 60h) [reset = 0h]
AES_DATA_IN_0 is shown in Figure 17-38 and described in Table 17-28.
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Data register to read and write plaintext and ciphertext (MSW).
Figure 17-38. AES_DATA_IN_0 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DATA
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 17-28. AES_DATA_IN_0 Register Field Descriptions
Bit Field Type Reset Description
31-0 DATA R/W 0h
Data to encrypt or decrypt
17.4.26 AES_DATA_IN_1 Register (Offset = 64h) [reset = 0h]
AES_DATA_IN_1 is shown in Figure 17-39 and described in Table 17-29.
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Data register to read and write plaintext and ciphertext.
Figure 17-39. AES_DATA_IN_1 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DATA
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 17-29. AES_DATA_IN_1 Register Field Descriptions
Bit Field Type Reset Description
31-0 DATA R/W 0h
Data to encrypt or decrypt