Timer Registers
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SWRU543–January 2019
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General-Purpose Timers
9.5.18 GPTMTBR Register (offset = 4Ch) [reset = FFFFh]
GPTMTBR is shown in Figure 9-22 and described in Table 9-26.
When a GPTM is configured to one of the 32-bit modes, the contents of bits 15:0 in this register are
loaded into the upper 16 bits of the GPTMTAR register. Reads from this register return the current value
of Timer B. In a 16-bit mode, bits 15:0 contain the value of the counter and bits 23:16 contain the value of
the prescaler in input edge-count, input edge-time, and PWM modes, which is the upper 8 bits of the
count. Bits 31:24 always read as 0. To read the value of the prescaler in 16-bit one-shot and periodic
modes, read bits [23:16] in the GPTMTBV register. To read the value of the prescalar in periodic snapshot
mode, read the Timer B Prescale Snapshot (GPTMTBPS) register.
Figure 9-22. GPTMTBR Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TBR
R-FFFFh
Table 9-26. GPTMTBR Register Field Descriptions
Bit Field Type Reset Description
31-0 TBR R FFFFh
GPTM Timer B Register. A read returns the current value of the
GPTM Timer B Count register, in all cases except for input edge-
count and time modes. In the input edge-count mode, this register
contains the number of edges that have occurred. In the input edge-
time mode, this register contains the time at which the last edge
event took place.
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