I2S Registers
www.ti.com
440
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Inter-Integrated Sound (I2S) Multichannel Audio Serial Port
12.5.17 XMASK Register (Offset = A4h) [reset = 0h]
XMASK is shown in Figure 12-20 and described in Table 12-22.
Return to Summary Table.
The transmit format unit bit mask register (XMASK) determines which bits of the transmitted data are
masked off and padded with a known value before being shifted out the McASP.
Figure 12-20. XMASK Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
XMASK[31-0]
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 12-22. XMASK Register Field Descriptions
Bit Field Type Reset Description
31-0 XMASK[31-0] R/W 0h
Transmit data mask enable bit.
0h = Corresponding bit of transmit data (before passing through
reverse and rotate units) is masked out and then padded with the
selected bit pad value (XPAD and XPBIT bits in XFMT), which is
transmitted out the McASP in place of the original bit.
1h = Corresponding bit of transmit data (before passing through
reverse and rotate units) is transmitted out the McASP.
To Next Page
Loading...
