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SWRU543–January 2019
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Cortex
®
-M4 Peripherals
3.3.1.9 ACTIVE_0 to ACTIVE_6 Register (offset = 300h to 318h) [reset = 0h]
ACTIVE_0 to ACTIVE_6 is shown in Figure 3-9 and described in Table 3-12.
The UNPENDn registers indicate which interrupts are active. Bit 0 of ACTIVE0 corresponds to Interrupt 0;
bit 31 corresponds to Interrupt 31. Bit 0 of ACTIVE1 corresponds to Interrupt 32; bit 31 corresponds to
Interrupt 63. Bit 0 of ACTIVE2 corresponds to Interrupt 64; bit 31 corresponds to Interrupt 95. Bit 0 of
ACTIVE3 corresponds to Interrupt 96; bit 31 corresponds to Interrupt 127. Bit 0 of ACTIVE4 corresponds
to Interrupt 128; bit 31 corresponds to Interrupt 159. Bit 0 of ACTIVE5 corresponds to Interrupt 160; bit 31
corresponds to Interrupt 191. Bit 0 of ACTIVE6 corresponds to Interrupt 192; bit 7 corresponds to Interrupt
199.
CAUTION
Do not manually set or clear the bits in this register.
Figure 3-9. ACTIVE_0 to ACTIVE_6 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
INT
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 3-12. ACTIVE_0 to ACTIVE_6 Register Field Descriptions
Bit Field Type Reset Description
31-0 INT R 0h
Interrupt Active
0h = The corresponding interrupt is not active.
1h = The corresponding interrupt is active, or active and pending.
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