CRC Registers
www.ti.com
760
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Cyclical Redundancy Check (CRC)
20.3.3 CRCDIN Register (Offset = C14h) [reset = 0h]
CRCDIN is shown in Figure 20-3 and described in Table 20-6.
Return to Summary Table.
The application writes the CRC Data Input (CRCDIN) register with the next byte or word to compute.
Figure 20-3. CRCDIN Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DATAIN
R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 20-6. CRCDIN Register Field Descriptions
Bit Field Type Reset Description
31-0 DATAIN R/W 0h
Data Input
This register contains the input data value for the CRC or checksum
operation.