Texas Instruments CC3235 SimpleLink Series - Master RECEIVE of Multiple Data Bytes

Read data from
I2CMDR
Idle
W
rite Slave
Address to
I2CMSA
Sequence
may be
omitted in a
Single Master
system
Read I2CMCS
Read I2CMCS
BUSY bit=0?
NO
YES
NO
BUSBSY
bit=0?
NO
ERROR bit=0?
YES
W
rite ---01011
to I2CMCS
Read data from
I2CMDR
NO
ARBLST
bit=1?
W
rite ---01001
NO
to I2CMCS
Index=m-1?
W
rite ---0-100
to I2CMCS
YES
YES
Error
Service
W
rite ---00101
to I2CMCS
Idle
Read I2CMCS
NO
BUSY
bit=0?
YES
NO
ERROR bit=0?
Error
Service
YES
Idle
www.ti.com Functional Description
217
SWRU543–January 2019
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Inter-Integrated Circuit (I
2
C) Interface
Figure 7-10. Master RECEIVE of Multiple Data Bytes