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SWRU543–January 2019
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Cortex
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-M4 Peripherals
3.3.1.3 STRELOAD Register (Offset = 14h) [reset = 0h]
STRELOAD is shown in Figure 3-3 and described in Table 3-6.
Return to Summary Table.
The STRELOAD register specifies the start value to load into the SysTick Current Value (STCURRENT)
register when the counter reaches 0. The start value can be between 0x1 and 0x00FF.FFFF. A start value
of 0 is possible, but has no effect because the SysTick interrupt and the COUNT bit are activated when
counting from 1 to 0. SysTick can be configured as a multi-shot timer, repeated over and over, firing every
N+1 clock pulses, where N is any value from 1 to 0x00FF.FFFF. For example, if a tick interrupt is required
every 100 clock pulses, 99 must be written into the RELOAD field. To access this register correctly, the
system clock must be faster than 8 MHz.
NOTE: This register can only be accessed from privileged mode.
Figure 3-3. STRELOAD Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED RELOAD
R-0h R/W-0h
LEGEND: R/W = Read/Write; R = Read only; W1toCl = Write 1 to clear bit; -n = value after reset
Table 3-6. STRELOAD Register Field Descriptions
Bit Field Type Reset Description
31-24 RESERVED R 0h
23-0 RELOAD R/W 0h
Reload Value
Value to load into the SysTick Current Value (STCURRENT) register
when the counter reaches 0.
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