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AES Module Programming Guide
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SWRU543–January 2019
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Copyright © 2019, Texas Instruments Incorporated
Advance Encryption Standard Accelerator (AES)
17.3 AES Module Programming Guide
17.3.1 AES Low-Level Programming Models
This section describes the low-level hardware programming sequences for configuring and using the AES
module.
17.3.1.1 Global Initialization
The following list describes the requirements for initializing the AES and associated modules.
1. Enable the clock to cryptography module (that includes AES) by setting the R0 bit in the
(CRYPTOCLKEN) register in the application reset and clock management module (physical address:
0x4402 50B8).
2. Configure the AES µDMA channels for Context In, Context Out, Data In, and Data Out by
programming the appropriate encoding value in the DMA Channel Map Select n (DMA_CHMAPn)
register in the µDMA module. For more information, refer to Section 1.3.3.
3. If the AES channels are configured in the µDMA, enable the required AES DMA requests by
programming bits [9:5] of the AES_SYSCONFIG register, in addition to the completion interrupts in the
AES DMA Interrupt Mask (DTHE_AES_IM) register.
4. Specify the size of the keys by programming the KEY_SIZE bit field in the AES_CTRL register.
5. Load the AES Key 1 (AES_KEY1_n) register.
6. Load the AES Key 2 (AES_KEY2_n) register if it is used by the configuration mode.
7. Configure the AES for the appropriate encryption or decryption mode (see Section 17.3.1.2).
8. Select encryption or decryption by programming the DIRECTION bit in the AES Control (AES_CTRL)
register.
17.3.1.2 Initialization Subsequence
The following sections list the initialization subsequences for the available encryption and decryption
modes:
Subsequence: Initialize CCM AES Core Mode
The steps to initialize CCM mode follow:
1. Define the width of the length field and the length of the authentication field by programming the
CCM_L and CCM_M bit fields in the AES_CTRL register.
2. Enable counter mode by setting the CTR bit in the AES_CTRL register.
3. Load the authentication data length in the AUTH field of the AES Authentication Data Length
(AES_AUTH_LENGTH) register.
4. Select the IV counter by programming the CTR_WIDTH field in the AES_CTRL register.
5. Load the AES Initialization Vector Input n (AES_IV_IN_n) registers.
Subsequence: Initialize GCM AES Core Mode
The steps to enable GCM mode follow:
1. Enable counter mode by setting the CTR bit in the AES_CTRL register.
2. Load the authentication data length in the AUTH field of the AES Authentication Data Length
(AES_AUTH_LENGTH) register.
3. Select the IV counter by programming the CTR_WIDTH field in the AES_CTRL register.
4. Load the AES Initialization Vector Input n (AES_IV_IN_n) registers.
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