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I2C Registers
225
SWRU543–January 2019
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Copyright © 2019, Texas Instruments Incorporated
Inter-Integrated Circuit (I
2
C) Interface
Table 7-5. I2CMCS Register Field Descriptions (continued)
Bit Field Type Reset Description
4 ARBLST_OR_HS R/W 0h
Arbitration Lost (R) or Reserved (High-Speed Enable Not Supported)
(W)
0h (W) = The master operates in Standard or Fast mode as selected
by using a value in the I2CMTPR register that results in an SCL
frequency of 100 kbps for standard mode, or 400 kbps for fast mode.
0h (R) = The I2C controller won arbitration.
1h (R) = The I2C controller lost arbitration.
3 DATACK_OR_ACK R/W 0h
Acknowledge Data (R) or Data Acknowledge Enable (W)
0h (W) = The received data byte is not acknowledged automatically
by the master.
0h (R) = The transmitted data was acknowledged
1h (W) = The received data byte is acknowledged automatically by
the master.
1h (R) = The transmitted data was not acknowledged.
2 ADRACK_OR_STOP R/W 0h
Acknowledge Address (R) or Generate STOP (W)
0h (W) = The controller does not generate the STOP condition.
0h (R) = The transmitted address was acknowledged
1h (W) = The controller generates the STOP condition.
1h (R) = The transmitted address was not acknowledged.
1 ERROR_OR_START R/W 0h
Error (R) or Generate START (W)
The error can be when the slave address is not acknowledged, or
when the transmit data is not acknowledged.
0h (W) = The controller does not generate the START condition.
0h (R) = No error was detected on the last operation.
1h (W) = The controller generates the START or repeated START
condition.
1h (R) = An error occurred on the last operation.
0 BUSY_OR_RUN R/W 0h
I2C Busy (R) or I2C Master Enable (W)
When the BUSY bit is set, the other status bits are not valid. Note
that the BURST and RUN bits are mutually exclusive.
0h (W) = In standard mode, this encoding means the master is
unable to transmit or receive data. In Burst mode, this bit is not used
and must be set to 0.
0h (R) = The controller is idle.
1h (W) = The master is able to transmit or receive data. Note that
this bit cannot be set in burst mode.
1h (R) = The controller is busy.
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