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Texas Instruments CC3235 SimpleLink Series - Page 450

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I2S Registers
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450
SWRU543January 2019
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Copyright © 2019, Texas Instruments Incorporated
Inter-Integrated Sound (I2S) Multichannel Audio Serial Port
Table 12-29. XSTAT Register Field Descriptions (continued)
Bit Field Type Reset Description
3 XTDMSLOT R 0h
Returns the LSB of XSLOT. Allows a single read of XSTAT to
determine whether the current TDM time slot is even or odd.
0h = Current TDM time slot is odd.
1h = Current TDM time slot is even.
2 RESERVED R 0h
Reserved. The reserved bit location always returns the default value.
A value written to this field has no effect. If writing to this field,
always write the default value for future device compatibility.
1 XSYNCERR R/W 0h
Unexpected transmit frame sync flag. XSYNCERR is set when a
new transmit frame sync (AFSX) occurs before it is expected.
Causes a transmit interrupt (XINT), if this bit is set and XSYNCERR
in XINTCTL is set. This bit is cleared by writing a 1 to this bit. Writing
a 0 has no effect.
0h = Unexpected transmit frame sync did not occur.
1h = Unexpected transmit frame sync did occur.
0 XUNDRN R/W 0h
Transmitter underrun flag. XUNDRN is set when the transmit
serializer is instructed to transfer data from XBUF to XRSR, but
XBUF has not yet been serviced with new data since the last
transfer. Causes a transmit interrupt (XINT), if this bit is set and
XUNDRN in XINTCTL is set. This bit is cleared by writing a 1 to this
bit. Writing a 0 has no effect.
0h = Transmitter underrun did not occur.
1h = Transmitter underrun did occur.

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