www.ti.com
AES Registers
645
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Advance Encryption Standard Accelerator (AES)
Table 17-24. AES_CTRL Register Field Descriptions (continued)
Bit Field Type Reset Description
2 DIRECTION R/W 0h
If set to 1, an encrypt operation is performed. If set to 0, a decrypt
operation is performed.
0h = Decryption is selected
1h = Encryption is selected
1 INPUT_READY RO 0h
If 1, this read-only status bit indicates that the 16-byte input buffer is
empty, and the host is permitted to write the next block of data.
0 OUTPUT_READY RO 0h
If 1, this read-only status bit indicates that an AES output block is
available for the host to retrieve.