ADSP-21368 SHARC Processor Hardware Reference I-37
Index
UART registers (continued)
UARTxLSR (line status register), 11-4,
A-120
UARTxRBR (receive buffer register),
11-5
UARTxSCR (scratch register), 11-12,
A-126
UARTxTHR (transmit holding register),
11-4, 11-5, A-121
UARTxTSR (transmit shift register),
11-4
UARTBI (UART break interrupt), 11-9
UARTFE (UART framing error), 11-9
UARTOE (UART overrun error), 11-9
UARTPE (UART parity error), 11-9
UMODE (user mode breakpoint) bit,
A-175
user mode breakpoint (UMODE), A-175
W
wait states, enabling (WS bit), A-18
word length, 5-43
word length (SLEN) bits, 5-17, 5-29
word packing enable (packing 16-bit to
32-bit words) PACK bit, 5-62, A-37
word select timing in I
2
S mode, 5-25
write (WR
) pin, 3-21, 3-83
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