UART Registers
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SWRU543–January 2019
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Universal Asynchronous Receivers/Transmitters (UARTs)
Table 6-8. UARTLCRH Register Field Descriptions (continued)
Bit Field Type Reset Description
2 EPS R/W 0h
UART Even Parity Select
This bit has no effect when parity is disabled by the PEN bit.
0h = Odd parity is performed, which checks for an odd number of 1s.
1h = Even parity generation and checking is performed during
transmission and reception, which checks for an even number of 1s
in data and parity bits.
1 PEN R/W 0h
UART Parity Enable
0h = Parity is disabled and no parity bit is added to the data frame.
1h = Parity checking and generation is enabled.
0 BRK R/W 0h
UART Send Break
A low level is continually output on the UnTx signal, after completing
transmission of the current character. For the proper execution of the
break command, software must set this bit for at least two frames
(character periods).
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