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I2C Registers
249
SWRU543–January 2019
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Inter-Integrated Circuit (I
2
C) Interface
Table 7-21. I2CSIMR Register Field Descriptions (continued)
Bit Field Type Reset Description
2 STOPIM R/W 0h
Stop Condition Interrupt Mask
0h = The STOPRIS interrupt is suppressed and not sent to the
interrupt controller.
1h = The STOP condition interrupt is sent to the interrupt controller
when the STOPRIS bit in the I2CSRIS register is set.
1 STARTIM R/W 0h
Start Condition Interrupt Mask
0h = The STARTRIS interrupt is suppressed and not sent to the
interrupt controller.
1h = The START condition interrupt is sent to the interrupt controller
when the STARTRIS bit in the I2CSRIS register is set.
0 DATAIM R/W 0h
Data Interrupt Mask
0h = The DATARIS interrupt is suppressed and not sent to the
interrupt controller.
1h = Data interrupt sent to interrupt controller when DATARIS bit in
the I2CSRIS register is set.
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