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I2C Registers
255
SWRU543–January 2019
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Inter-Integrated Circuit (I
2
C) Interface
Table 7-24. I2CSICR Register Field Descriptions (continued)
Bit Field Type Reset Description
1 STARTIC W 0h
Start Condition Interrupt Clear
Writing a 1 to this bit clears the STARTRIS bit in the I2CSRIS
register and the STARTMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
0 DATAIC W 0h
Start Condition Interrupt Clear
Writing a 1 to this bit clears the STARTRIS bit in the I2CSRIS
register and the STARTMIS bit in the I2CSMIS register.
A read of this register returns no meaningful data.
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