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SWRU543–January 2019
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Copyright © 2019, Texas Instruments Incorporated
List of Tables
16-14. Sense-on-Power Configurations ........................................................................................ 610
17-1. Key-Block-Round Combinations........................................................................................ 615
17-2. Interrupts and Events..................................................................................................... 626
17-3. AES Registers............................................................................................................. 632
17-4. AES_KEY2_6 Register Field Descriptions ............................................................................ 633
17-5. AES_KEY2_7 Register Field Descriptions ............................................................................ 633
17-6. AES_KEY2_4 Register Field Descriptions ............................................................................ 634
17-7. AES_KEY2_5 Register Field Descriptions ............................................................................ 634
17-8. AES_KEY2_2 Register Field Descriptions ............................................................................ 635
17-9. AES_KEY2_3 Register Field Descriptions ............................................................................ 635
17-10. AES_KEY2_0 Register Field Descriptions ............................................................................ 636
17-11. AES_KEY2_1 Register Field Descriptions ............................................................................ 636
17-12. AES_KEY1_6 Register Field Descriptions ............................................................................ 637
17-13. AES_KEY1_7 Register Field Descriptions ............................................................................ 637
17-14. AES_KEY1_4 Register Field Descriptions ............................................................................ 638
17-15. AES_KEY1_5 Register Field Descriptions ............................................................................ 638
17-16. AES_KEY1_2 Register Field Descriptions ............................................................................ 639
17-17. AES_KEY1_3 Register Field Descriptions ............................................................................ 639
17-18. AES_KEY1_0 Register Field Descriptions ............................................................................ 640
17-19. AES_KEY1_1 Register Field Descriptions ............................................................................ 640
17-20. AES_IV_IN_0 Register Field Descriptions ............................................................................ 641
17-21. AES_IV_IN_1 Register Field Descriptions ............................................................................ 641
17-22. AES_IV_IN_2 Register Field Descriptions ............................................................................ 642
17-23. AES_IV_IN_3 Register Field Descriptions ............................................................................ 642
17-24. AES_CTRL Register Field Descriptions ............................................................................... 643
17-25. AES_C_LENGTH_0 Register Field Descriptions..................................................................... 646
17-26. AES_C_LENGTH_1 Register Field Descriptions..................................................................... 647
17-27. AES_AUTH_LENGTH Register Field Descriptions .................................................................. 648
17-28. AES_DATA_IN_0 Register Field Descriptions........................................................................ 649
17-29. AES_DATA_IN_1 Register Field Descriptions........................................................................ 649
17-30. AES_DATA_IN_2 Register Field Descriptions........................................................................ 650
17-31. AES_DATA_IN_3 Register Field Descriptions........................................................................ 650
17-32. AES_TAG_OUT_0 Register Field Descriptions ...................................................................... 651
17-33. AES_TAG_OUT_1 Register Field Descriptions ...................................................................... 651
17-34. AES_TAG_OUT_2 Register Field Descriptions ...................................................................... 652
17-35. AES_TAG_OUT_3 Register Field Descriptions ...................................................................... 652
17-36. AES_REVISION Register Field Descriptions ......................................................................... 653
17-37. AES_SYSCONFIG Register Field Descriptions ...................................................................... 655
17-38. AES_IRQSTATUS Register Field Descriptions....................................................................... 656
17-39. AES_IRQENABLE Register Field Descriptions....................................................................... 657
17-40. CRYPTOCLKEN Register Field Descriptions......................................................................... 658
17-41. DTHE_AES_IM Register Field Descriptions .......................................................................... 659
17-42. DTHE_AES_RIS Register Field Descriptions......................................................................... 660
17-43. DTHE_AES_MIS Register Field Descriptions......................................................................... 661
17-44. DTHE_AES_IC Register Field Descriptions........................................................................... 662
18-1. Key Repartition............................................................................................................ 664
18-2. DES Global Initialization ................................................................................................. 668
18-3. DES Algorithm Type Configuration..................................................................................... 668
18-4. 3DES Algorithm Type Configuration ................................................................................... 669