Texas Instruments CC3235 SimpleLink Series - Page 31

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31
SWRU543–January 2019
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List of Tables
15-18. GPIO0SWRST Register Field Descriptions ........................................................................... 545
15-19. GPIO1CLKEN Register Field Descriptions............................................................................ 546
15-20. GPIO1SWRST Register Field Descriptions ........................................................................... 547
15-21. GPIO2CLKEN Register Field Descriptions............................................................................ 548
15-22. GPIO2SWRST Register Field Descriptions ........................................................................... 549
15-23. GPIO3CLKEN Register Field Descriptions............................................................................ 550
15-24. GPIO3SWRST Register Field Descriptions ........................................................................... 551
15-25. GPIO4CLKEN Register Field Descriptions............................................................................ 552
15-26. GPIO4SWRST Register Field Descriptions ........................................................................... 553
15-27. WDTCLKEN Register Field Descriptions .............................................................................. 554
15-28. WDTSWRST Register Field Descriptions ............................................................................. 555
15-29. UART0CLKEN Register Field Descriptions ........................................................................... 556
15-30. UART0SWRST Register Field Descriptions........................................................................... 557
15-31. UART1CLKEN Register Field Descriptions ........................................................................... 558
15-32. UART1SWRST Register Field Descriptions........................................................................... 559
15-33. GPT0CLKCFG Register Field Descriptions ........................................................................... 560
15-34. GPT0SWRST Register Field Descriptions ............................................................................ 561
15-35. GPT1CLKEN Register Field Descriptions ............................................................................. 562
15-36. GPT1SWRST Register Field Descriptions ............................................................................ 563
15-37. GPT2CLKEN Register Field Descriptions ............................................................................. 564
15-38. GPT2SWRST Register Field Descriptions ............................................................................ 565
15-39. GPT3CLKEN Register Field Descriptions ............................................................................. 566
15-40. GPT3SWRST Register Field Descriptions ............................................................................ 567
15-41. MCASPCLKCFG0 Register Field Descriptions ....................................................................... 568
15-42. MCASPCLKCFG1 Register Field Descriptions ....................................................................... 569
15-43. I2CLCKEN Register Field Descriptions................................................................................ 570
15-44. I2CSWRST Register Field Descriptions ............................................................................... 571
15-45. LPDSREQ Register Field Descriptions ................................................................................ 572
15-46. TURBOREQ Register Field Descriptions.............................................................................. 573
15-47. DSLPWAKECFG Register Field Descriptions ........................................................................ 574
15-48. DSLPTIMRCFG Register Field Descriptions.......................................................................... 575
15-49. SLPWAKEEN Register Field Descriptions ............................................................................ 576
15-50. SLPTMRCFG Register Field Descriptions ............................................................................ 577
15-51. WAKENWP Register Field Descriptions............................................................................... 578
15-52. RCM_IS Register Field Descriptions................................................................................... 579
15-53. RCM_IEN Register Field Descriptions ................................................................................. 580
16-1. GPIO Pin Electrical Specifications (25°C) (Except Pins 29, 30, 45, 50, 52, 53) ................................. 583
16-2. GPIO Pin Electrical Specifications (25°C) For Pins 29, 30, 45, 50, 52, 53 ....................................... 583
16-3. Pin Internal Pullup and Pulldown Electrical Specifications (25°C) ................................................. 583
16-4. Analog Mux Control Registers and Bits................................................................................ 587
16-5. Board-Level Behavior .................................................................................................... 588
16-6. GPIO/Pins Available for Application.................................................................................... 589
16-7. Pin Multiplexing ........................................................................................................... 592
16-8. Pin Groups for Audio Interface (I2S) ................................................................................... 603
16-9. Pin Groups for SPI Interface (GSPI) ................................................................................... 603
16-10. Pin Groups for SD-Card Interface ...................................................................................... 603
16-11. Pad Configuration Registers ............................................................................................ 604
16-12. GPIO_PAD_CONFIG_0 to GPIO_PAD_CONFIG_32 Register Description ...................................... 605
16-13. Recommended Pin Multiplexing Configurations ...................................................................... 607