Texas Instruments CC3235 SimpleLink Series - Page 320

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SWRU543–January 2019
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General-Purpose Timers
Table 9-10. GPTMTAMR Register Field Descriptions (continued)
Bit Field Type Reset Description
8 TAILD R/W 0h
GPTM Timer A Interval Load Write. Note the state of this bit has no
effect when counting up. The bit descriptions above apply if the timer
is enabled and running. If the timer is disabled (TAEN is clear) when
this bit is set, GPTMTAR, GPTMTAV, and GPTMTAPs are updated
when the timer is enabled. If the timer is stalled (TASTALL is set),
GPTMTAR and GPTMTAPS are updated according to the
configuration of this bit.
0h = Updates the GPTMTAR and GPTMTAV registers with the value
in the GPTMTAILR register on the next cycle. Also updates the
GPTMTAPS register with the value in the GPTMTAPR register on
the next cycle.
1h = Updates the GPTMTAR and GPTMTAV registers with the value
in the GPTMTAILR register on the next time-out. Also updates the
GPTMTAPS register with the value in the GPTMTAPR register on
the next time-out.
7-6 RESERVED R 0h
5 TAMIE R/W 0h
GPTM Timer A Match Interrupt Enable
0h = The match interrupt is disabled for match events. Additionally,
triggers to the DMA on match events are prevented.
1h = An interrupt is generated when the match value in the
GPTMTAMATCHR register is reached in the one-shot and periodic
modes.
4 TACDIR R/W 0h
GPTM Timer A Count Direction. When in PWM mode, the status of
this bit is ignored. PWM mode always counts down.
0h = The timer counts down.
1h = The timer counts up. When counting up, the timer starts from a
value of 0x0.
3 TAAMS R/W 0h
GPTM Timer A Alternate Mode Select. The TAAMS values are
defined as follows. Note: To enable PWM mode, clear the TACMR
bit and configure the TAMR field to 0x1 or 0x2.
0h = Capture or compare mode is enabled.
1h = PWM mode is enabled.
2 TACMIR R/W 0h
GPTM Timer A Capture Mode. The TACMR values are defined as
follows:
0h = Edge-count mode
1h = Edge-time mode
1-0 TAMR R/W 0h
GPTM Timer A Mode. The TAMR values are defined as follows: The
timer mode is based on the timer configuration defined by bits 2:0 in
the GPTMCFG register.
0h = Reserved
1h = One-shot timer mode
2h = Periodic timer mode
3h = Capture mode