CRC Registers
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SWRU543–January 2019
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Cyclical Redundancy Check (CRC)
Table 20-4. CRCCTRL Register Field Descriptions (continued)
Bit Field Type Reset Description
5-4 ENDIAN R/W 0h
Endian Control
This field is used to program the endian configuration. The
encodings below are with respect to an input word = (B3, B2, B1,
B0)
See Table 20-1 for more information regarding endian configuration
and control.
0h = Configuration unchanged. (B3, B2, B1, B0)
1h = Bytes are swapped in halfwords but halfwords are not swapped
(B2, B3, B0, B1)
2h = Halfwords are swapped but bytes are not swapped in halfword.
(B1, B0, B3, B2)
3h = Bytes are swapped in halfwords and halfwords are swapped.
(B0, B1, B2, B3)
3-0 TYPE R/W 0h
Operation Type
The TYPE value in the CRCCTRL register should be exclusive.
0h = Polynomial 0x8005
1h = Polynomial 0x1021
2h = Polynomial 0x4C11DB7
3h = Polynomial 0x1EDC6F41
4h - 7h = Reserved
8h = TCP checksum
9h - Fh = Reserved
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