Texas Instruments CC3235 SimpleLink Series - Page 793

www.ti.com DMA_ICR Register (offset = 9Ch) [reset = 0h]
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SWRU543–January 2019
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CC3235x Device Miscellaneous Registers
Table B-5. DMA_ICR Register Field Descriptions (continued)
Bit Field Type Reset Description
0 SDIOMRD R/W 0h
SDIOM_RD_DMA_DONE_INT_ACK
0h = No effect
1h = Clear corresponding interrupt