Analog Devices SHARC ADSP-21368 - Page 879

ADSP-21368 SHARC Processor Hardware Reference I-23
Index
S/PDIF (continued)
serial clock input, 9-24
serial data, 9-10
single-channel, double-frequencey
format, 9-8
SRU control registers, 9-8, 9-18
SRU routing, 9-11
stream disconnected
(DIR_NOSTREAM) bit, A-95
subframe format, 9-4
two channel mode, 9-8
S/PDIF bits
biphase error (DIR_BIPHASEERROR),
A-95
buffer enable (DIT_CHANBUF), 9-25
channel status buffer enable
(DIT_CHANBUF), A-88
channel status byte 0 A
(DIT_B0CHANL), A-89
channel status byte 0 B
(DIT_B0CHANR), A-89
channel status byte 0 for subframe A
(DIR_B0CHANL), A-95
channel status byte 0 for subframe B
(DIR_B0CHANR), A-95
disable PLL (DIR_PLLDIS), A-93
frequency multiplier (DIT_FREQ),
A-88
lock error (DIR_LOCK), A-93
lock receiver (DIR_LOCK), A-95
non-audio frame mode channel 1 and 2
(DIR_NOAUDIOLR), A-95
non-audio subframe mode channel 1
(DIR_NOAUDIOL), A-95
parity (DIR_PARITYERROR), A-95
parity biphase error (DIR_BIPHASE),
A-93
receive mute (DIR_MUTE), A-93
S/PDIF bits (continued)
select single-channel, double-frequency
mode channel (DIT_SCDF_LR),
A-88
serial data input format
(DIT_SMODEIN), A-88
single channel enable (TX_SCDF_EN),
9-9
single channel enable left right
(TX_SCDF_EN), 9-9
single channel left right
(TX_SCDF_LR), 9-9
single-channel, double-frequency
channel select (DIR_SCDF_LR),
A-93
single-channel, double-frequency mode
enable (DIR_SCDF), A-93
transmit mute (DIT_MUTE), A-87
transmit single-channel,
double-frequency enable
(DIT_SCDF), A-88
transmitter enable (DIT_EN), A-87
user, 9-9
validity (DIR_VALID), A-95
validity bit A (DIT_VALIDL), A-88
validity bit B (DIT_VALIDR), A-88,
A-89
S/PDIF registers
audio data output
(SPDIF_RX_DAT_O), 9-18
bi-phase encoded data (SPDIF_RX_I),
9-18
channal A transmit status
(SPDIF_TX_CHSTA), A-89, A-90
channal B transmit status
(SPDIF_TX_CHSTB), A-90
channel status, 9-12
control (DITCTL), 9-12
external frame sync
(SPDIF_EXTPLLCLK_I), 9-18