Texas Instruments CC3235 SimpleLink Series - Page 25

www.ti.com
25
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
List of Tables
List of Tables
0-1. Register Bit Accessibility and Initial Condition ......................................................................... 36
2-1. Summary of Processor Mode, Privilege Level, and Stack Use ...................................................... 54
2-2. Processor Register Map................................................................................................... 55
2-3. PSR Register Combinations .............................................................................................. 57
2-4. Memory Map................................................................................................................ 59
2-5. SRAM Memory Bit-Banding Regions.................................................................................... 60
2-6. Exception Types............................................................................................................ 64
2-7. CC32xx Application Processor Interrupts ............................................................................... 64
2-8. Faults ........................................................................................................................ 68
2-9. Fault Status and Fault Address Registers .............................................................................. 70
2-10. Cortex
®
-M4 Instruction Summary ........................................................................................ 73
3-1. Core Peripheral Register Regions ....................................................................................... 78
3-2. Peripherals Register Map ................................................................................................. 80
3-3. Cortex Registers............................................................................................................ 83
3-4. ACTLR Register Field Descriptions...................................................................................... 84
3-5. STCTRL Register Field Descriptions .................................................................................... 86
3-6. STRELOAD Register Field Descriptions ................................................................................ 87
3-7. STCURRENT Register Field Descriptions.............................................................................. 88
3-8. EN_0 to EN_6 Register Field Descriptions ............................................................................. 89
3-9. DIS_0 to DIS_6 Register Field Descriptions............................................................................ 90
3-10. PEND_0 to PEND_6 Register Field Descriptions...................................................................... 91
3-11. UNPEND_0 to UNPEND_6 Register Field Descriptions.............................................................. 92
3-12. ACTIVE_0 to ACTIVE_6 Register Field Descriptions ................................................................. 93
3-13. PRI_0 to PRI_49 Register Field Descriptions .......................................................................... 94
3-14. CPUID Register Field Descriptions ...................................................................................... 95
3-15. INTCTRL Register Field Descriptions ................................................................................... 96
3-16. VTABLE Register Field Descriptions .................................................................................... 98
3-17. APINT Register Field Descriptions....................................................................................... 99
3-18. SYSCTRL Register Field Descriptions................................................................................. 101
3-19. CFGCTRL Register Field Descriptions ................................................................................ 102
3-20. SYSPRI1 Register Field Descriptions.................................................................................. 104
3-21. SYSPRI2 Register Field Descriptions.................................................................................. 105
3-22. SYSPRI3 Register Field Descriptions.................................................................................. 106
3-23. SYSHNDCTRL Register Field Descriptions........................................................................... 107
3-24. FAULTSTAT Register Field Descriptions.............................................................................. 111
3-25. HFAULTSTAT Register Field Descriptions............................................................................ 114
3-26. FAULTDDR Register Field Descriptions............................................................................... 115
3-27. SWTRIG Register Field Descriptions .................................................................................. 116
4-1. DMA Channel Assignment............................................................................................... 119
4-2. Channel Control Memory ................................................................................................ 121
4-3. Individual Control Structure.............................................................................................. 121
4-4. 8-Bit Data Peripheral Configuration .................................................................................... 126
4-5. µDMA Register Map...................................................................................................... 127
4-6. DM Registers.............................................................................................................. 128
4-7. DMA_SRCENDP Register Field Descriptions ........................................................................ 129
4-8. DMA_DSTENDP Register Field Descriptions......................................................................... 129
4-9. DMA_CHCTL Register Field Descriptions............................................................................. 130