Functional Description
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SWRU543–January 2019
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SPI (Serial Peripheral Interface)
8.2.5 Interrupts
According to the state of the transmitter register and the receiver register, the channel can issue interrupt
events if enabled. A status bit in the SPI_IRQSTATUS register of each interrupt event indicates service is
required. Each interrupt event contains an interrupt enable bit in the SPI_IRQENABLE register; this bit
enables the status to generate hardware interrupt requests. When an interrupt occurs and a mask is then
applied on it (IRQENABLE), the interrupt line is not asserted again, even if the interrupt source has not
been serviced.
SPI supports interrupt-driven operation and polling.
8.2.5.1 Interrupt-Driven Operation
Alternatively, an interrupt enable bit in the SPI_IRQENABLE register can be set to enable each event to
generate an interrupt request when the corresponding event occurs. Status bits are automatically set by
hardware logic conditions.
When an event occurs (the single interrupt line is asserted), the local host must perform actions:
• Read the SPI_IRQSTATUS register to identify which event occurred.
• Write 1 to the corresponding bit of the SPI_IRQSTATUS register to clear the interrupt status and
release the interrupt line.
• For interrupt handling, perform one of the following actions:
– Read the receiver register that corresponds to the event, to remove the source of an RX_full event.
– Write to the transmitter register that corresponds to the event, to remove the source of a TX_empty
event.
NOTE: No action is needed to remove the source of the events TX_underflow and RX_overflow.
The interrupt status bit should always be reset after a channel is enabled and before events are enabled
as an interrupt source.
8.2.5.2 Polling
When the interrupt capability of an event is disabled in the SPI_IRQENABLE register, the interrupt line is
not asserted and ?? all of the following occur:
• The status bits in the SPI_IRQSTATUS register is polled by software to detect when the corresponding
event occurs.
• When the expected event occurs, the local host must read the receiver register that corresponds to the
event to remove the source of an RX_full event, or write into the transmitter register that corresponds
to the event to remove the source of a TX_empty event. No action is needed to remove the source of
the events TX_underflow and RX_overflow.
• Writing 1 to the corresponding bit of the SPI_IRQSTATUS register clears the interrupt status and does
not affect the interrupt line state.
8.2.6 DMA Requests
The SPI can be interfaced with a DMA controller. At the system level, the advantage is to discharge the
local host of the data transfers. According to FIFO level (if using a buffer for the channel), the channel can
issue DMA requests if enabled. The DMA requests must be disabled to get TX and RX interrupts. There
are two DMA request lines for the channel.
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