Initialization and Configuration
www.ti.com
282
SWRU543–January 2019
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
SPI (Serial Peripheral Interface)
e. Read received data from the RX FIFO:
SPIDataGet(GSPI_BASE,&<ulDummy>)
f. Disable chip select:
SPICSDisable(GSPI_BASE)
8.3.3 Slave Mode Operation With Interrupt
a. Set the interrupt vector table base and enable master interrupt for NVIC:
IntVTableBaseSet( <address_of_vector_table> )IntMasterEnable()
b. Configure the SPI with the following parameters:
• Mode: 4-pin/slave
• Word Length: 8 bits
SPIConfigSetExpClk(GSPI_BASE,PRCMPeripheralClockGet(PRCM_GSPI),
SPI_IF_BIT_RATE, SPI_MODE_SLAVE, SPI_SUB_MODE_0,
(SPI_HW_CTRL_CS |
SPI_4PIN_MODE |
SPI_TURBO_OFF |
SPI_CS_ACTIVEHIGH |
SPI_WL_8))
c. Register the interrupt handler:
SPIIntRegister(GSPI_BASE, <SlaveIntHandler> )
d. Enable the transmit empty and receive full interrupts:
SPIIntEnable(GSPI_BASE,SPI_INT_RX_FULL|SPI_INT_TX_EMPTY)
e. Enable SPI channel for communication:
SPIEnable(GSPI_BASE)
8.3.4 Generic Interrupt Handler Implementation
void SlaveIntHandler()
{
unsigned long ulDummy;
unsigned long ulStatus;
// Read the interrupt status
ulStatus = SPIIntStatus(GSPI_BASE,true);
// Acknowledge the interrupts
SPIIntClear(GSPI_BASE,SPI_INT_RX_FULL|SPI_INT_TX_EMPTY);
// If TX empty, write a new data into SPI register
if(ulStatus & SPI_INT_TX_EMPTY)
{
SPIDataPut(GSPI_BASE,
<user_data>)
}
// if RX is full, readout the data from SPI
if(ulStatus & SPI_INT_RX_FULL)
{
SPIDataGetNonBlocking(GSPI_BASE,
&ulDummy);
}
}
8.4 Access to Data Registers
This section describes the supported data accesses (read or write) to and from the data receiver registers
SPI_RX and data transmitter registers SPI_TX.