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SWRU543–January 2019
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Copyright © 2019, Texas Instruments Incorporated
Data Encryption Standard Accelerator (DES)
Chapter 18
SWRU543–January 2019
Data Encryption Standard Accelerator (DES)
The DES module provides hardware-accelerated data encryption and decryption functions. The module
runs either the single DES or the triple DES (3DES) algorithm in compliance with the FIPS 46-3 standard,
and supports electronic codebook (ECB), cipher block chaining (CBC), and cipher feedback (CFB) modes
of operation. Output feedback (OFB) mode of operation is not supported in hardware.
The purpose of the DES algorithm is to encrypt (encipher) or decrypt (decipher) binary-coded information.
Encrypting data converts it to an unintelligible form called ciphertext. Decrypting ciphertext converts the
data back to its original form called plaintext. DES is a symmetrical algorithm in that the encryption and
decryption keys are identical. Each triple DES encrypt or decrypt operation is a compound of DES encrypt
and decrypt operations.
The DES accelerator includes the following features:
• DES and 3DES encryption and decryption
• Feedback modes: ECB, CBC, and CFB
• Host interrupt or µDMA-driven modes of operation. µDMA support for data and context in/result out
• Fully synchronous design
• Internal wide-bus interface
Topic ........................................................................................................................... Page
18.1 DES Functional Description............................................................................... 664
18.2 DES Block Diagram .......................................................................................... 664
18.3 DES-Supported Modes of Operation ................................................................... 666
18.4 DES Module Programming Guide – Low-Level Programming Models ..................... 668
18.5 DES Registers.................................................................................................. 673