Analog Devices SHARC ADSP-21368 - Page 891

ADSP-21368 SHARC Processor Hardware Reference I-35
Index
TWI controller (continued)
little endian word order, 12-9
prescale register, 12-4
programming examples, 12-15
start and stop conditions, 12-13
transferring data, 12-10
TWI controller bits
address not acknowledged (TWIANAK),
A-141
buffer write error (TWIWERR), A-142
clock high (TWICLKHI), A-133
clock low (TWICLKLOW), A-133
data not acknowledged (TWIDNAK),
A-141
data transfer count (TWIDCNT), A-138
enable (TWIEN), 12-4, A-132
fast mode (TWIFAST), A-137
general call enable (TWIGCE), A-134
issue stop condition (TWISTOP), A-137
lost arbitration (TWILOST), A-141
master address length (TWIMLEN),
A-137
master mode enable (TWIMEN), A-137
master transfer direction (TWIMDIR),
A-137
master transfer in progress
(TWIMPROG), A-141
not acknowledged (TWINAK), A-134
repeat START (TWIRSTART), A-137
serial clock override (TWISCLOVR),
A-138
serial clock sense (TWISCLSEN), A-142
serial data override (TWISDAOVR),
A-138
serial data sense (TWISDASEN), A-142
slave address length (TWISLEN), A-134
slave enable (TWISEN), A-134
slave transmit data valid (TWIDVAL),
A-134
TWI controller registers
clock divider (TWIDIV), 12-5, A-132
RXTWI16 (16-bit receive FIFO)
register, 12-10
RXTWI8 (8-bit receive FIFO), 12-9
TWIFIFOCTL (FIFO control), 12-7
TWIFIFOSTAT (FIFO status), 12-7
TWIIMASK (interrupt mask), 12-8
TWIIRPTL (interrupt), 12-7
TWIMADDR (master mode address),
12-6, A-139
TWIMCTL (master mode control),
12-6, A-136
TWIMSTAT (master mode status),
12-7, A-140
TWISADDR (slave mode address),
12-6, A-135
TWISCTL (slave mode control), A-133
TWISSTAT (slave mode status),
12-6,
A-135
TXTWI16 (16-bit transmit FIFO), 12-8
TXTWI8 (8-bit transmit FIFO), 12-8
two channel mode (SPDIF), 9-8
TX_UACEN (DMA transmit buffer
enable) bit, 11-12
TXCOL (SPI transmit collision error) bit,
6-37
TXFLSH (flush SPI transmit buffer) bit,
6-23, A-55
TXS_A (data buffer channel B status) bit,
A-40
TXSPI, TXSPIB (SPI transmit buffer)
registers, 2-26, 6-10, 6-13, 6-37,
A-59, A-60
TXSPx (serial port transmit buffer)
registers, 2-26, A-43