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Texas Instruments CC3235 SimpleLink Series - Page 8

Texas Instruments CC3235 SimpleLink Series
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8
SWRU543–January 2019
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Copyright © 2019, Texas Instruments Incorporated
Contents
13.6.3 Basic APIs for Enabling and Configuring the Interface .................................................... 480
13.6.4 APIs for Data Transfer [Direct Access to FIFO and DMA Setup] ........................................ 481
13.6.5 APIs for Interrupt Usage ....................................................................................... 482
13.6.6 APIs for Setting Up ADC Timer for Time-Stamping the Samples........................................ 485
14 Parallel Camera Interface Module ....................................................................................... 487
14.1 Overview ................................................................................................................... 488
14.2 Image Sensor Interface .................................................................................................. 488
14.3 Functional Description.................................................................................................... 489
14.3.1 Modes of Operation ............................................................................................ 489
14.3.2 FIFO Buffer ...................................................................................................... 492
14.3.3 Reset ............................................................................................................. 492
14.3.4 Clock Generation ............................................................................................... 492
14.3.5 Interrupt Generation ............................................................................................ 493
14.3.6 DMA Interface................................................................................................... 493
14.4 Programming Model...................................................................................................... 494
14.4.1 Camera Core Reset ............................................................................................ 494
14.4.2 Enable the Picture Acquisition ................................................................................ 494
14.4.3 Disable the Picture Acquisition................................................................................ 495
14.5 Interrupt Handling......................................................................................................... 495
14.5.1 FIFO_OF_IRQ (FIFO Overflow) .............................................................................. 495
14.5.2 FIFO_UF_IRQ (FIFO Underflow) ............................................................................. 495
14.6 Camera Registers ........................................................................................................ 496
14.6.1 CC_SYSCONFIG Register (Offset = 10h) [reset = 0h] .................................................... 497
14.6.2 CC_SYSSTATUS Register (Offset = 14h) [reset = X] ..................................................... 498
14.6.3 CC_IRQSTATUS Register (Offset = 18h) [reset = 0h]..................................................... 499
14.6.4 CC_IRQENABLE Register (Offset = 1Ch) [reset = 0h] .................................................... 501
14.6.5 CC_CTRL Register (Offset = 40h) [reset = 1001h] ........................................................ 503
14.6.6 CC_CTRL_DMA Register (Offset = 44h) [reset = 207h] .................................................. 505
14.6.7 CC_CTRL_XCLK Register (Offset = 48h) [reset = 0h] .................................................... 506
14.6.8 CC_FIFODATA Register (Offset = 4Ch) [reset = X] ....................................................... 507
14.7 Peripheral Library APIs .................................................................................................. 508
14.8 Developer’s Guide ........................................................................................................ 511
14.8.1 Using Peripheral Driver APIs for Capturing an Image ..................................................... 511
14.8.2 Using Peripheral Driver APIs for Communicating With Image Sensors ................................. 513
15 Power, Reset, and Clock Management................................................................................. 515
15.1 Overview ................................................................................................................... 516
15.1.1 Power Management Unit (PMU).............................................................................. 516
15.1.2 VBAT Wide-Voltage Connection.............................................................................. 517
15.1.3 Supply Brownout and Blackout ............................................................................... 517
15.1.4 Application Processor Power Modes......................................................................... 518
15.2 Power Management Control Architecture ............................................................................. 519
15.2.1 Global Power-Reset-Clock Manager (GPRCM) ............................................................ 520
15.2.2 Application Reset-Clock Manager (ARCM) ................................................................. 522
15.3 PRCM APIs................................................................................................................ 522
15.3.1 MCU Initialization ............................................................................................... 522
15.3.2 Reset Control.................................................................................................... 522
15.3.3 Peripheral Reset ................................................................................................ 522
15.3.4 Reset Cause..................................................................................................... 523
15.3.5 Clock Control.................................................................................................... 523
15.3.6 Low-Power Modes.............................................................................................. 524
15.3.7 Sleep (SLEEP) .................................................................................................. 524
15.3.8 Low-Power Deep Sleep (LPDS) .............................................................................. 525
15.3.9 Hibernate (HIB) ................................................................................................. 526

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