Analog Devices SHARC ADSP-21368 - Page 883

ADSP-21368 SHARC Processor Hardware Reference I-27
Index
software interrupt (SFT0x) bit, B-18, B-21,
B-26
software interrupt x, user (SFTxI) bit, B-18,
B-21, B-26
software reset (SRST) bit, A-6
SOVFI (stack overflow/full) bit, B-15,
B-19, B-23
SP0I (serial port interrupt) bit, B-8
SP2I (serial port interrupt) bit, B-8
SP4I (serial port interrupt) bit, B-9
SPCNTx (serial port count) registers, A-45
SPCTLx (serial port control) registers,
2-26, 5-4, 5-6, 5-7, 5-59, 5-72
SPCTLx control bits for left-justify sample
pair mode, 5-13
SPDIF_TX_CHSTA (Sony/Philips digital
interface channel status) register,
A-89, A-90, A-91
SPDIF_TX_CTL (Sony/Philips digital
interface transmit control) register,
A-86
special IDP registers, A-109
specifications, timing, 14-28
SPEN_A (serial port channel A enable) bit,
5-17, 5-61, A-37
SPEN_B (serial port channel B enable) bit,
5-17, 5-61
SPI
See also SPI bits, registers
block diagram, 6-3
broadcast mode, 6-3, 6-8
chaining, DMA, 6-16
change clock polarity, 6-21
changing configuration, 6-21
clock (SPICLK) pin, 6-4, 6-5, 6-8, 6-27
clock (SPICLK) signal, 6-2
clock phase, 6-28
clock rate, 6-5
clock signal (SPICLK), 6-4
clock, active edge, defined, 6-5
SPI (continued)
clock, sampling edge, defined, 6-5
configuring and enabling, 6-15
data transfer operations, 6-13
device select signal, 6-6
DMA, 6-14 to 6-27, A-61 to A-65
DMA, switching from transmit to receive
mode, 6-23
error signals and flags, 6-35
features, 6-1
finished (SPIF) bit, 6-30
FLAGx pins, 6-4
formats, 6-35
functional description, 6-2
general operations, 6-8
interface signals, 6-4
interrupts, 6-14, 6-17, 6-33
master input slave output (MISOx) pins,
6-2, 6-7
master mode operation, configuring for,
6-10
master out slave in (MOSIx) pins, 6-2,
6-7, 6-8
master-slave interconnections, 6-4
MISOx (master in, slave out) pins, 6-7
multidevice configuration, 6-12
multimaster environment, 6-8
multimaster error or mode-fault error
(MME) bit, 6-9
open drain output enable (OPD) pin,
6-9
operation, master mode, 6-15
operation, slave mode, 6-19
operations, 6-8, 6-10
packed data transfers, 6-32
programming examples, 6-38
receive buffer register (RXSPI, RXSPIB),
2-26
receive data (RXSPI) buffer, 6-2, 6-10
registers, A-52 to A-65