Analog Devices SHARC ADSP-21368 - Page 871

ADSP-21368 SHARC Processor Hardware Reference I-15
Index
IMASKP (interrupt mask pointer) register,
B-22
IMSPI (serial peripheral interface address
modify) register, 6-16, 6-19, A-64
IMSPx (SPORT DMA address modifier)
registers, 2-27, 2-29, A-50
INCLUDE directory, 5-49
INDATA interrupt enable
(EEMUINENS) bit, A-182
INDIV (input divisor) bit, A-172
input data port. See IDP
input setup and hold time, 14-32
input signal conditioning, 14-32
input slave select enable (ISSEN) bit, 6-36,
A-54
input synchronization delay, 14-8
instruction address breakpoint hit
(STATIx) bit, A-181
instruction rate, 14-14
instructions
atomic, using for clock and frame sync,
13-10
conditional in SDRAM, 3-82, 3-93
dual data move restriction, 3-78
external memory fetch, 3-25
packed, 3-20
return from interrupt, 4-67
INTEN (DMA interrupt enable) bit, 6-34
interconnections, master-slave, 6-4
internal clock select (ICLK) bit, 5-62
internal frame sync (SPORT IFS) bit, 5-63
internal I/O bus, 2-19
internal I/O bus arbitration (request and
grant), 2-19
internal interrupt vector table (IIVT) bit,
A-6
internal memory
DMA count (CSPx) registers, A-51
DMA index (IDP_DMA_Ix) registers,
7-28
internal memory (continued)
DMA index (IISPx) registers, 2-27, 2-29,
A-50
DMA modifier (IDP_DMA_Mx)
registers, 7-28
DMA modifier (IMSPx) registers, 2-27,
2-29
memory-to-memory data transfers, 2-48
transfers, 2-48
internal memory banks, 3-33
internal serial clock
(ICLK) bit, 5-62
setting, 5-17
internal transmit frame sync (IFS) bit, 5-63
internal vs. external frame syncs, 5-38
INTERR (enable interrupt on error) bit,
6-34
interrupt
hardware, B-15, B-20
input x interrupt (IRQxI) bit, B-15,
B-16, B-20, B-24
latch (IRPTL) register, B-13
latch/mask (LIRPTL) register, B-6
mask (IMASK) register, B-18
mask pointer (IMASKP) register, B-22
peripheral interrupt priority registers
(PICR), A-164
PWM interrupt (P13I) bit, B-9
transfers, starting, 7-18, 7-20, 7-23
interrupt and timer pins, 14-8
interrupt controller, digital audio interface,
4-65, A-112
interrupt driven DMA, I/O processor, 2-8
interrupt input (IRQ2-0)
pins, 14-8
interrupt input x interrupt (IRQxI) bit,
B-19, B-24
interrupt latch (IRPTL) register, 6-34,
B-13
interrupt latch/mask (LIRPTL) registers,
6-34, B-6