NXP Semiconductors MPC5606S - Debug Mode (SPI Modes Only)

Quad Serial Peripheral Interface (QuadSPI)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 999
30.2.3.6 Debug mode (SPI modes only)
The Debug mode is used for system development and debugging, it is controlled by additional logic
outside of the module. When the MCU is stopped by a debugger and the QSPI_MCR[FRZ] bit is set
QuadSPI stops all serial transfers.
30.3 External signal description
30.3.1 Overview
Table 30-4 lists the signals of the external signals belonging to the QuadSPI module in conjunction with
the different modes of operation.
Table 30-5 shows how the signals are connected on the MPC5606S in SPI and serial flash modes. Serial
flash mode is selected by setting QSPI_MCR[QMODE]. Using a quad flash memory as an SPI device on
the fly (that is, on-the-fly change of mode from SFM to SPI or vice versa) may not be possible for all flash
memories. Check I/O compatibility before using this.
Table 30-4. Signal properties
Signal name
Function and direction
SPI Master mode SPI Slave mode SPI Slave mode
PCS0_2 Peripheral Chip
Select 0
Output Slave Select Input Peripheral Chip
Select
Output
PCS2_2,
PCS1_2
Peripheral Chip
Select 1–2
Output Unused Unused
SIN_2 Serial Data In Input Serial Data In Input Serial I/O 0 Bidir
SOUT_2 Serial Data Out Output Serial Data Out Tri st ate
1
1
Driven only when the module is selected by the SPI master. HiZ otherwise.
Serial I/O 1 Bidir
QSPI_IO2 Unused Unused Serial I/O 2 Bidir
QSPI_IO3 Unused Unused Serial I/O 3 Bidir
SCK_2 Serial Clock Output Serial Clock Input Serial Clock Output
Table 30-5. Connectivity of signals on this device
Chip signal SPI mode
1
Serial flash mode
2
PF[10] CS_0 (Chip Select) PCS (Chip Select Out)
PF[11] CS_1 (Chip Select) IO2 (Bidir)
PF[12] CS_2 IO3 (Bidir)
PF[13] SIN (Serial Data In) IO0
PF[14] SOUT (Serial Data Out) IO1
PF[15] SCK (Serial Clock) Clock Out