Deserial Serial Peripheral Interface (DSPI)
MPC5606S Microcontroller Reference Manual, Rev. 7
288 Freescale Semiconductor
For more information, refer to Section 11.8.1.1, Master mode.
11.5.2 Slave mode
Slave mode allows the DSPI to communicate with SPI bus masters. In this mode the DSPI responds to
externally controlled serial transfers. The DSPI cannot initiate serial transfers in Slave mode. In Slave
mode, the SCK signal and the CS0_x signal are configured as inputs and provided by a bus master. CS0_x
must be configured as input and pulled high. If the internal pullup is being used, then the appropriate bits
in the relevant SIU_PCR must be set (SIU_PCR [WPE = 1], [WPS = 1]).
For more information, refer to Section 11.8.1.2, Slave mode.
11.5.3 Module Disable mode
The Module Disable mode is used for MCU power management. The clock to the non-memory mapped
logic in the DSPI is stopped while in Module Disable mode. The DSPI enters the Module Disable mode
when the MDIS bit in DSPIx_MCR is set.
For more information, refer to Section 11.8.1.3, Module Disable mode.
11.5.4 External Stop mode
The External Stop mode is used for MCU power management. The DSPI supports the IPI Green-Line
Interface Stop mode mechanism. When a request is made to enter External Stop mode, the DSPI block
acknowledges the request and completes the transfer in progress. When the DSPI reaches the frame
boundary it signals that the system clocks to the DSPI block may be shut off.
11.5.5 Debug mode
Debug mode is used for system development and debugging. If the MCU is stopped by a debugger while
the DSPIx_MCR[FRZ] bit is set, the DSPI halts operation on the next frame boundary. If the MCU is
stopped by a debugger while the FRZ bit is cleared, the DSPI behavior is unaffected and remains dictated
by the module-specific mode and configuration of the DSPI.
For more information, refer to Section 11.8.1.5, Debug mode.
11.6 External signal description
11.6.1 Signal overview
Table 11-1 lists off-chip DSPI signals.
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