NXP Semiconductors MPC5606S - Peripheral Status Register 2 (ME_PS2)

Mode Entry Module (MC_ME)
MPC5606S Microcontroller Reference Manual, Rev. 7
930 Freescale Semiconductor
25.3.2.18 Peripheral Status Register 2 (ME_PS2)
This register provides the status of the peripherals. Please refer to Table 25-12 for details.
25.3.2.19 Peripheral Status Register 3 (ME_PS3)
This register provides the status of the peripherals. Please refer to Table 25-12 for details.
Address 0xC3FD_C068 Access: Supervisor read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 0 0
S_PIT_RTI
S_RTC_API
S_MC_PCU
S_MC_RGM S_MC_CGM
S_MC_ME
S_SSCM
0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0
S_CFLASH1
0 0
S_eMIOS1 S_eMIOS0
0 0
S_WKPU
S_SIUL
S_DFLASH0 S_CFLASH0
0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 25-19. Peripheral Status Register 2 (ME_PS2)
Address 0xC3FD_C06C Access: Supervisor read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0 0 0 0 0 0
S_CMU0
0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 25-20. Peripheral Status Register 3 (ME_PS3)