NXP Semiconductors MPC5606S - Soft Lock Bit Register L1

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 397
12.3.4.41 Soft Lock Bit Register L1
Figure 12-50 represents the Soft Lock Bit Register for Layer1. This is used to protect the seven control
descriptor layer registers for Layer1.
5
SLB_L0_2
Soft Lock Bit for Control Desc L0_2 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
6
SLB_L0_3
Soft Lock Bit for Control Desc L0_3 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
7
SLB_L0_4
Soft Lock Bit for Control Desc L0_4 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
8
WEN_L0_5
Write Enable for Soft Lock Bit SLB_L0_5
0 SLB is not modified
1 Value is written to SLB
9
WEN_L0_6
Write Enable for Soft Lock Bit SLB_L0_6
0 SLB is not modified
1 Value is written to SLB
10
WEN_L0_7
Write Enable for Soft Lock Bit SLB_L0_7
0 SLB is not modified
1 Value is written to SLB
12
SLB_L0_5
Soft Lock Bit for Control Desc L0_5 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
13
SLB_L0_6
Soft Lock Bit for Control Desc L0_6 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
14
SLB_L0_7
Soft Lock Bit for Control Desc L0_7 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
Table 12-44. Soft Lock Register L0 field descriptions (continued)
Field Description