NXP Semiconductors MPC5606S - Register Descriptions

Stepper Stall Detect (SSD)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1161
36.3.2 Register descriptions
This section describes the individual bits of all the SSD registers. Note that the details of the functional
description linked to these bits is given in Section 36.4, Functional description.
36.3.2.1 SSD Control and Status Register (CONTROL)
Figure 36-2 below describes the fields of the main control (CONTROL) register:
The function of the CONTROL register bits is shown in Table 36-3.
Offset: 0x00 Access: User read/write
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R 0
STEP RCIR
ITGD
IR
BLN
DCL
ITGD
CL
RTZ
E
0
BLN
ST
ITGS
T
0 0 0
SDC
PU
0
W TRIG
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 36-2. SSD Control and Status Register (CONTROL)
Table 36-3. CONTROL Register field description
Field Description
15
TRIG
Trigger Blanking  Integration sequence (BIS).
0 No effect.
1 Sequence of blanking  integration is triggered.
14–13
STEP
Full Step State. These bits determine which coil is driven for SM movement,. Refer to Tabl e 36-10
for details of the step states.
00 Select 0

angle (east pole) state for the electromagnetic field in the SM.
01 Select 90

angle (north pole) state for the electromagnetic field in the SM.
10 Select 180

angle (west pole) state for the electromagnetic field in the SM.
11 Select 270

angle (south pole) state for the electromagnetic field in the SM.
12
RCIR
Blanking Polarity for coil recirculation. Refer to Section 36.4, Functional description, for details of
the recirculation mode.
0 Coil recirculation via high side transistors (VDDM, analog supply voltage).
1 Coil recirculation via low side transistors (VSSM, analog GND).
11
ITGDIR
Direction (polarity) of integration. Refer to Section 36.4.1.4.3, DC Offset Cancellation, for details
10
BLNDCL
Drive Coil during Blanking.
0 During the BIS blanking phase the other coils is not driven by the SSD. The SM will not move
during blanking.
1 During the BIS blanking phase the other coil is actually driven by the SSD block (genuine use
case).
9
ITGDCL
Drive Coil during Integration and outside of any BIS.
1 During the BIS integration phase and outside of any BIS the other coil is actually driven by the
SSD block (genuine use case). Outside of any BIS the same coil is driven.
0 During the BIS integration phase the other coils is not driven by the SSD. Outside of any BIS
no coil is driven. The SM will not move during integration (not useful for SSD).