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NXP Semiconductors MPC5606S - Non-Volatile Private Censorship Password 1 Register (NVPWD1)

NXP Semiconductors MPC5606S
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Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 581
17.2.6.24 Non-Volatile Private Censorship Password 1 Register (NVPWD1)
The Non-volatile Private Censorship Password 1 Register contains the 32 MSB of the Password used to
validate the Censorship information contained in NVSCI0–1 registers.
17.2.6.25 Non-volatile System Censoring Information 0 register (NVSCI0)
The Non-volatile System Censoring Information 0 register stores the 32 LSB of the Censorship Control
Word of the SoC.
The NVSCI0 is a non-volatile register located in Shadow block: it is read during the reset phase of the flash
module and the protection mechanisms are activated consequently.
The parts are delivered uncensored to the user.
Address Offset: 0x203DDC Reset value: 0xCAFEBEEF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
PWD
63
PWD
62
PWD
61
PWD
60
PWD
59
PWD
58
PWD
57
PWD
56
PWD
55
PWD
54
PWD
53
PWD
52
PWD
51
PWD
50
PWD
49
PWD
48
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
PWD
47
PWD
46
PWd4
5
PWD
44
PWD
43
PWD
42
PWD
41
PWD
40
PWD
39
PWD
38
PWD
37
PWD
36
PWD
35
PWD
34
PWD
33
PWD
32
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
Figure 17-22. Non-Volatile Private Censorship Password 1 Register (NVPWD1)
Table 17-32. NVPWD1 field descriptions
Field Description
0:31 PWD63-32: PassWorD 63-32 (Read/Write)
The PWD63-32 registers represent the 32 MSB of the Private Censorship Password.
Address Offset: 0x203DE0 Delivery value: 0x55AA55AA
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
SC15 SC14 SC13 SC12 SC11 SC10 SC9 SC8 SC7 SC6 SC5 SC4 SC3 SC2 SC1 SC0
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
CW1
5
CW1
4
CW1
3
CW1
2
CW1
1
CW1
0
CW9 CW8 CW7 CW6 CW5 CW4 CW3 CW2 CW1 CW0
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
Figure 17-23. Non-volatile System Censoring Information 0 register (NVSCI0)

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