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NXP Semiconductors MPC5606S - Introduction

NXP Semiconductors MPC5606S
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Nexus Development Interface (NDI)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 955
Chapter 26
Nexus Development Interface (NDI)
26.1 Introduction
The Nexus Development Interface (NDI) block provides real-time development support capabilities for
the MPC5606S MCU in compliance with the IEEE-ISTO 5001-2003 standard. This development support
is supplied for MCUs without requiring external address and data pins for internal visibility.
The NDI block is an integration of several individual Nexus blocks that are selected to provide the
development support interface for MPC5606S.
The NDI block interfaces to the e200z0 and internal buses to provide development support as per the
IEEE-ISTO 5001-2003 standard. The development support provided includes program trace, watchpoint
messaging, ownership trace, watchpoint triggering, processor overrun control, run-time access to the
MCU’s internal memory map, and access to the e200z0 internal registers during halt, all via the JTAG port.
26.2 Block diagram
Figure 26-1 shows a functional block diagram of the NDI.
A simplified block diagram of the NDI illustrates the functionality and interdependence of major blocks
(see Figure 26-2) and how the individual Nexus blocks are combined to form the NDI.
Figure 26-1. NDI functional block diagram
Power-on
TCK
EVTO
MSEO
MDO
reset
Message
queue
Program trace
Ownership trace
Watchpoint trace
CPU
snoop
Message
formatter
Arbiter
Divided system
clock
e200z1
trace
information
e200z0
trace
information
MCKO
Input
TAP
controller
Control registers
to trace blocks
TDO
TDI
TMS
EVTI
Reset
control

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