LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
848 Freescale Semiconductor
23.7.2.6 UART mode status register (UARTSR)
Address: Base + 0x0014 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R SZF OCF PE3 PE2 PE1 PE0 RMB FEF BOF RPS WUF 0 0 DRF DTF NF
W w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 23-12. UART mode status register (UARTSR)
Table 23-11. UARTSR field descriptions
Field Description
0:15 Reserved
SZF
16
Stuck at Zero Flag
This bit is set by hardware when the bus is dominant for more than a 100-bit time. It is cleared by
software.
OCF
17
OCF Output Compare Flag
0 No output compare event occurred.
1 The content of the counter has matched the content of OC1[0:7] or OC2[0:7] in LINOCR.
An interrupt is generated if the OCIE bit in LINIER register is set.
PE3
18
Parity Error Flag Rx3
This bit indicates if there is a parity error in the corresponding received byte (Rx3). See
Section 23.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
PE2
19
Parity Error Flag Rx2
This bit indicates if there is a parity error in the corresponding received byte (Rx2). See
Section 23.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
PE1
20
Parity Error Flag Rx1
This bit indicates if there is a parity error in the corresponding received byte (Rx1). See
Section 23.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.
PE0
21
Parity Error Flag Rx0
This bit indicates if there is a parity error in the corresponding received byte (Rx0). See
Section 23.8.1.1, Buffer in UART mode. No interrupt is generated if this error occurs.
0 No parity error.
1 Parity error.