Stepper Stall Detect (SSD)
MPC5606S Microcontroller Reference Manual, Rev. 7
1160 Freescale Semiconductor
36.1.3.3 Stop mode
The CPU can activate Stop mode. In Stop mode, the system clocks driving the SSD block are stopped. In
Stop mode, the analog block is also disabled.
36.2 External signal description
Each of the four analog I/Os of the SSD block is used either as the output of a half-bridge sourcing or
sinking the current of the SM coil driven currently or —in case of acting as an input—the back EMF of
the non-driven coil with respect to an internally generated reference voltage is supplied to the
-modulator of the analog block. The signal properties are given in Table 36-1.
36.3 Memory map and register definition
This section provides a detailed description of the registers of the SSD block. Note that all registers are
16 bits in width. There is no access on byte level.
36.3.1 Memory map
Table 36-2 lists the registers of the SSD block.
Table 36-1. Signal properties
Name Port Coil Coil Node I/O Reset
COSP COSP Cosine Plus Analog I/O Z
COSM COSM Minus Analog I/O Z
SINP SINP Sine Plus Analog I/O Z
SINM SINM Minus Analog I/O Z
Table 36-2. Block memory map
Offset Register Name (Long) Register Name (Short) Access
1
1
Note that read/write registers may contain some read-only or write-only bits.
Location
0x00 SSD Control and Status Register CONTROL R/W on page 1161
0x02 SSD Interrupt Flag and Enable Register IRQ R/W on page 1162
0x04 SSD Integrator Accumulator Register ITGACC R on page 1163
0x06 SSD Down Counter Count register DCNT R on page 1163
0x08 SSD Blanking Counter Load Register BLNCNTLD R/W on page 1164
0x0A SSD Integration Counter Load Register ITGCNTLD R/W on page 1164
0x0C SSD Prescaler Register PRESCALE R/W on page 1165
0x0E RESERVED
2
2
Read access provides 0x0000. No write allowed.
n/a —
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