NXP Semiconductors MPC5606S - Unified Channel (UC)

Configurable Enhanced Modular IO Subsystem (eMIOS200)
MPC5606S Microcontroller Reference Manual, Rev. 7
256 Freescale Semiconductor
9.5.1 Unified Channel (UC)
Figure 9-19 shows the Unified Channel block diagram. Each Unified Channel consists of:
• Counter bus selector, which selects the time base to be used by the channel for all timing functions
• Programmable clock prescaler
• Two double-buffered data registers A and B that allow up to two input capture and/or output
compare events to occur before software intervention is needed
• Two comparators (equal only) A and B, which compare the selected counter bus with the value in
the data registers
• Internal counter, which can be used as a local time base or to count input events
• Programmable input filter, which ensures that only valid pin transitions are received by channel
• Programmable input edge detector, which detects the rising, falling, or either edge
• An output flip-flop, which holds the logic level to be applied to the output pin
• eMIOS200 Status and Control register
• An Output Disable Input selector, which selects the Output Disable Input signal that will be used
as output disable
Figure 9-19. Unified Channel block diagram
Figure 9-20 shows both the Unified Channel Control and Datapath block diagram. The Control block is
responsible for the generation of signals to control the multiplexes in the Datapath subblock. Each mode
is implemented by a dedicated logic independent from other modes, thus allowing optimization the logic
by disabling the mode and therefore its associated logic. The unused gates are removed during the
synthesis phase. Targeting the logic optimization, a set of registers is shared by the modes, thus providing
sequential events to be stored.
ips_rwb
uc_int_flag
RWCB
biu_channel_en
biu_a_en
biu_b_en
biu_cnt_en
biu_control_en
biu_status_en
ips_byte_7_0
ips_byte_15_8
ips_byte_23_16
ips_byte_31_24
IIB
Programmable
Filter
Clock
Prescaler
uc_ctrl
ipd_req
ipd_done
RQB
mode logic
Unified Channel
ips_addr[27:29]
uc_rd_data[0:31]
ips_wdata[0:31]
uc_datapath
Comparator A
Comparator B
Internal Counter
Counter Bus
Local Counter [B/C/D/E]
Global Counter [A]