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NXP Semiconductors MPC5606S - System Pins

NXP Semiconductors MPC5606S
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Signal Description
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 87
The pad type descriptions
The description of the pad configuration registers in Chapter 37, System Integration Unit Lite
(SIUL)
The device data sheet
3.6 System pins
The system pins are listed in Table 3-2.
3.7 Debug pins
The debug pins are listed in Table 3-3.
Table 3-2. System pin descriptions
System pin Function
I/O
direction
Pad
type
RESET
config
Pin No.
144 LQFP 176 LQFP
208 MAPB
GA
RESET Bidirectional reset with
Schmitt-Trigger
characteristics and noise
filter.
I/O M Input, weak
pullup
24 24 J1
XTAL Analog input of the
oscillator amplifier circuit.
Needs to be grounded if
oscillator bypass mode is
used.
I X 27 27 K1
EXTAL Analog output of the
oscillator amplifier circuit.
Input for the clock
generator in bypass mode.
X 29 29 M1
VRC_CTRL VREG ballast control gain. 25 25 P1
VREG_
BYPASS
1
1
VREG_BYPASS should be pulled down externally.
Pin used for factory testing. I X 32 32 M4
Table 3-3. Debug pin descriptions
Debu
g
pin
Function
Pad
typ
e
I/O
directio
n
for
debug
RESET
config
1
Pin number
144 LQFP
176 LQFP
2
208 MAPBGA
Muxed
Dedi-
cated
3
TCK JTAG test clock S I Input, Pullup 36 43 R1
TDI JTAG test data in S I Input, Pullup 33 36 P2

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