NXP Semiconductors MPC5606S - Phase0 Phase

Reset Generation Module (MC_RGM)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1089
x
Figure 31-11. MC_RGM State Machine
31.4.1.1 Phase0 Phase
This phase is entered immediately from any phase on a power-on or enabled ‘destructive’ reset event. The
reset state machine exits Phase0 and enters Phase1 on verification of the following:
• Startup has completed
PHASE0
PHASE1
PHASE2
PHASE3
IDLE
duration  3 fast internal RC oscillator (16MHz) clock cycles
FIRC stable, VREG voltage okay done
duration  350 fast internal RC oscillator (16MHz) clock
cycles
duration fast internal RC oscillator (16MHz) clock cycles
code and data flash initialization done
duration 40fast internal RC oscillator (16MHz) clock cycles
code and data flash initialization done
fast internal RC oscillator (16MHz) clock is running
startup has completed
power-on
or enabled
‘destructive’
reset
enabled
non-shortened
external or
‘functional’
reset
1
enabled
shortened
external or
‘functional’
reset
code and data flash initialization done
RESET released